Vikram Sarabhai Space Centre, Indian Space Research Organisation (ISRO) and Semiconductor Laboratory (SCL), Chandigarh, have collaborated to develop 32-bit microprocessors namely Vikram 3201 and Kalpana 3201, for space applications. The Vikram 3201 is the first Indian-made 32-bit microprocessor designed for use in harsh environmental conditions of launch vehicles, fabricated at SCL’s 180 nanometre (nm) complementary metal-oxide-semiconductor (CMOS) semiconductor fab.
The processor is an advanced version of the 16-bit Vikram 1601 microprocessor, used in ISRO’s launch vehicles since 2009. A “Make-in-India” version was introduced in 2016 after the 180nm semiconductor fab was established at SCL.
According to ISRO, Vikram 3201 and Vikram 1601 have a custom Instruction Set Architecture, with floating-point computation capability and high-level language support for the Ada language. All the software tools such as the Ada compiler, assembler, linker, simulator along with IDE are developed in-house by ISRO, a C language compiler is also under development for providing more flexibility to users in other domains. ISRO also mentioned that this is the first of its kind in India and has enabled ‘Atmanirbharat’ in the area of high-reliability microprocessors and onboard computers for navigation, guidance and control of launch vehicles. The initial lot of Vikram 3201 devices was successfully validated in space in the Mission Management Computer of the PSLV Orbital Experimental Module (POEM-4) in the PSLV-C60 mission.
Meanwhile, Kalpana 3201 is a 32-bit SPARC V8 (Scalable Processor ARChitecture, version 8) Reduced Instruction Set Computer (RISC) microprocessor and is based on the IEEE 1754 Instruction Set Architecture. This microprocessor has been designed to be compatible with open-source software toolsets along with in-house developed simulators and Integrated Development Environment (IDE), and has been tested with flight software.
In addition, four other devices that were jointly developed with SCL were also handed over towards significant miniaturisation of the launch vehicle Avionics system. This includes two versions of a Reconfigurable Data Acquisition System (RDAS) integrating multiple indigenously designed 24-bit Sigma-Delta Analog to Digital Converters on a single chip along with a Relay driver Integrated Circuit, and a Multi-Channel Low Drop-out Regulator Integrated Circuit for high-reliability applications.
